PULSE COUNTER

; PULSE COUNTER reference. The COUNTER chip on p6 tallies the strobe pulses the
; firmware drives on p7; a pulse on p5 resets it. The firmware reads the running
; count back with inp and scales it by the per-case step (input[0]) to draw a
; staircase that is locked to the hardware tally, not recomputed from immediates.
        mov  r0, 0
        ldb  r2, [r0]      ; r2 = input[0] = per-case step height
top:
        out  p5, 255       ; pulse RESET high
        slp  1
        out  p5, 0         ; RESET low: the counter is now zero
        slp  1
loop:
        inp  r1, p6        ; read the hardware count
        mov  r3, r1
        mul  r3, r2        ; scale the count by the per-case step
        out  p0, r3        ; draw the scaled count on the DAC
        out  p7, 255       ; strobe the counter up one
        slp  1
        out  p7, 0         ; release the strobe (the rising edge counted)
        slp  1
        cmp  r1, 7
        jge  top           ; after eight rungs, reset and climb again
        jmp  loop

# PULSE COUNTER. ACT 5. SCOPE waveform board.
# TITLE PULSE COUNTER
# OBJECTIVE Strobe the hardware counter and show its running count climb the DAC.
# A real COUNTER chip counts the strobe pulses the firmware sends and presents the
# tally on p6; the firmware must read that tally back with inp and scale it, never
# recompute it, so the staircase stays aligned to the hardware. The battery moves
# the per-case step height (seeded into the input), so a transcript of one staircase
# diverges on the next: only reading the counter and scaling by the seed locks all.
ID sc_a5_01_pulse_counter
WINDOW 80
DIR p0 OUT
DIR p5 OUT
DIR p7 OUT
DIR p6 IN
PERIPH DAC data=p0 label=DAC_on_p0
PERIPH COUNTER in=p6 strobe=p7 reset=p5 label=COUNTER_on_p6
CHAN p0 ANALOG label=CH1_p0_DAC
CASE phase=16
INPUT addr=0 label=STEP
PAR power=560 lines=19 chips=2